一种高性能MCS-51兼容微控制器的设计

A design of high performance MCS-51 compatible microcontroller

描述了一种高性能,可复用的MCS-51兼容微控制器的设计.该控制器使用Verilog HDL描述,并且与现有工业标准的MSC-51指令集完全兼容.与传统MCS-51相比该控制器使用预取指令、分立总线、并行乘除法器等技术,改善了控制器的性能,平均执行效率提高了约10倍,允许用户自由设置ROM和RAM的大小,灵活性更强.此外,在控制器的设计上还引入了专门的时钟控制模块,使控制器能够实现降低工作频率、待机和休眠等功能.该控制器的功能已在FPGA平台上实测成功.

It is presented the design of a high performance, reusable and MCS-51 compatible microcontroller. This microcontroller is implemented in Verilog HDL and fully compatibility with the industrial standards MCS-51 on instruction sets. Be different from standard MCS-51, pre-fetching instruction method, independent bus, and pipeline multiplier and divider module has been implemented in this MCU. Theses changes enhance microcontroller＇s performance and instruction executing efficiency about 10 times faster than before. A user has opportunity to determine the MCU＇s RAM and ROM sizes in order to improve flexibility. Otherwise, considering power consumption, a special CCU （Clock Controller Unit） is adopted to implement lower working frequency, standby and hibernation mode. This MCU has been mapped onto FPGA platform and tested successfully