性能优化的现场可编程门阵列快速编译方法

Fast performance-optimized compilation method for field programmable gate array

针对现场可编程门阵列(FPGA)的快速编译问题,提出了基于性能优化的动态复合宏单元(PODCM)库的编译方法.通过分析在数据流图(DFG)关键路径上生成PODCM的条件,给出了在DFG关键路径上生成PODCM的算法并建立了PODCM库.在此基础上,根据PODCM替换算法,运用PODCM替换DFG关键路径上的节点,减小了DFG关键路径的执行时间.实验结果表明,该方法在不增加资源需求,保持较高编译速度的情况下,优化了FPGA设计的性能.

A new compilation method with performance-optimized dynamic compound macro （PODCM）library was proposed for fast compilation of field programmable gate array（FPGA）. After studying conditions for generating PODCM in the critical path of data flow graph（DFG）, an algorithm was introduced to produce PODCM. Based on PODCM library and according to PODCM replacement algorithm, PODCMs were applied to replace nodes in the critical path of DFG, which provided significant reduction in DFG critical timing. Experiment results show that with high compilation speed and no increase of resources, the new compilation method can efficiently improve the performance of FPGA design.