摘要
A scheme of a frequency-hopping frequency-synthesizer applied to a Bluetooth ratio frequency （RF） front-end is presented,and design of a voltage controlled oscillator （VCO） and dual-modulus prescaler are focused on.It is fabricated in a 0.18 μm mixed-signal CMOS （complementary metal-oxide-semiconductor transistor） process.The power dissipation of VCO is low and a stable performance is gained.The measured phase noise of VCO at 2.4 GHz is less than -114.32 dBc/Hz.The structure of the DMP is optimized and a novel D-latch integrated with ＂OR＂ logic gate is used.The measured results show that the chip can work well under a 1.8 V power supply.The power dissipation of the core part in a dual modulus prescaler is only 5.76 mW.An RMS jitter of 2 ps is measured on the output signal at 118.3 MHz.It is less than 0.02% of the clock period.
提出了应用于蓝牙射频前端的跳频频率综合器的设计方案,并介绍了关键模块压控振荡器与双模预分频器的设计技术,采用混合0·18μmCMOS工艺进行了流片验证.设计的压控振荡器性能稳定,低功耗低相噪,频率在2·4GHz时测试相位噪声达-114·32dBc/Hz@2·4MHz.对双模分频器进行了设计优化,并采用一种集成“或”逻辑的锁存器结构,降低了功耗,提高了电路速度.测试结果显示电路在1·8V时稳定工作双模分频器核心功耗仅5·76mW;均方差抖动在输出周期为118·3MHz时仅为2ps,约占输出周期的0·02%.
