数字视音频解码中IDCT的FPGA实现

FPGA Implementation of IDCT in Decoding of Digital Video/Audio Signals

在MPEG视音频标准中,使用DCT(离散余旋变换)/IDCT(反离散余旋变换)来压缩数据。在数字视音频MP3解码电路中,IDCT是整个解码过程中运算量最大最耗时的一部分,因此IDCT的速度对整个MP3解码进程的速度起着极为关键的作用。在众多的解码过程实现方案中,用芯片实现是速度最快的一种方案。本方案是用RTL级的Verilog语言进行描述,用Synplify Pro综合成门级电路,然后用ModelSim仿真通过后,下载到X ilinx公司的V irtex的FPGA中。结果表明:电路工作正确可靠,速度上能满足MP3的实时播放要求。

IDCT/DCT is used in the MPEG video and audio standard to reduce the bandwidth requirements. IDCT is one of the most computation - intensive parts of the MPEG decoding process. A fast, hardware based IDCT implementation is crucial to speed the MPEG decoding process, This paper describes an implementation of IDCT in the Virtex family. The implementation is synthesizable Verilog code at the RTL level. It is suitable for real time video applications.