应用于32位嵌入式系统的中断控制IP的裁减设计

Reduction of interrupt controller IP applying in 32 bits embedded system

C*Core是32位RISC嵌入式微处理器核.对应用于C*Core的中断控制IP核进行了裁减和验证,分析了与C*Core的兼容性,并应用于变频器控制SoC的设计中.新的设计减少了使用的晶体管数量,降低了功耗及成本.

C＊Core is a kind of 32 bits embedded microprocessor. The reduction and verification of C＊Core＇s interrupt controller IP are introduced and its compatibility with C＊Core is analysed. Application of reduced IP proves an efficient method to save chip＇s area, cost and power consumption.