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P-channel Ge/Si Hetero-nanocrystal Based MOSFET Memory

P-channel Ge/Si Hetero-nanocrystal Based MOSFET Memory
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摘要 The charge storage characteristics of P-channel Ge/Si hetero-nanocrystal based MOSFET memory has been investigated and a logical array has been constructed using this memory cell. In the case of the thickness of tunneling oxide Tox = 2 nm and the dimensions of Si- and Ge-nanocrystal Dsi = DGe = 5 nm, the retention time of this device can reach ten years(~1 × 108 s) while the programming and erasing time achieve the orders of microsecond and millisecond at the control gate voltage | Vg | = 3 V with respect to N-wells,respectively. Therefore, this novel device, as an excellent nonvolatile memory operating at room temperature,is desired to obtain application in future VLSI. The charge storage characteristics of P-channel Ge/Si hetero-nanocrystal based MOSFET memory has been investigated and a logical array has been constructed using this memory cell. In the case of the thickness of tunneling oxide Tox = 2 nm and the dimensions of Si- and Ge-nanocrystal DSi = DGe = 5 nm, the retention time of this device can reach ten years(-1 × 10^8 s) while the programming and erasing time achieve the orders of microsecond and millisecond at the control gate voltage | Vg | = 3 V with respect to N-wells, respectively. Therefore, this novel device, as an excellent nonvolatile memory operating at room temperature, is desired to obtain application in future VLSI.
出处 《Semiconductor Photonics and Technology》 CAS 2005年第4期244-247,共4页 半导体光子学与技术(英文版)
基金 ScienceFoundationofHunanUniversity(521101805)
关键词 GE/SI Hetero-nanocrystal Nano-memory Direct tunneling Logic array 半导体技术 纳米晶体 场效应管 逻辑排列 存储单元
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  • 1Tiwari S, Rana F, Hanafi H, et al. A silicon nanocrystals based memory[j]. Appl. Phys. Lett. , 1996, 68:1 377-1 379.
  • 2Shi Y, Saito K, Ishikuro H, et al. Effects of traps on charge storage characteristics in metal-oxide-semiconductor memory structures based on silicon nanocrystals[J]. J. Appl. Phys., 1998, 84:2 358-2 360.
  • 3Liu Z, Lee C, Narayanan V, et al. Metal nanocrystal memories: Ⅰ. Device design and fabrication[J]. IEEE Trans.Electron Devices, 2002, 49: 1 606-1 613.
  • 4Lombardo S, De Salvo B, Gerardi C, et al. Silicon nanocrystal memories[J]. Microelectronic Engineering, 2004, 72:388-394.
  • 5Perego M, Ferrari S, Fanciulli M, et al. Characterization of silicon nanocrystals embedded in thin oxide layers by TOFSIMS[J]. Appl. Surf. Sci., 2004, 231-232: 813-816.
  • 6LammersD. Motorola speeds the move to nanocrystal flash [DB/OL]. http:∥www. eetimes. com/story/OEG20031208S0062
  • 7Shi Y, Ma T P, Prasad S, et al. Polarity dependent gate tunneling current in dual- gate CMOSFET's[J]. IEEE Trans.Electron Devices, 1998, 45:2 355-2 360.

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