基于FPGA的功率因数校正器的设计

The design for power factor correcti on based on FPGA

在基于DSP控制的PFC技术中,由于开关管的频率受到DSP运算速度的限制,不能做的很高．因此,本文提出了一种基于FPGA的功率因数校正方法,它不需要在每个开关周期内都计算一次功率器件的占空比,能够实现较高的开关频率和控制精度．

The switch can＇t operate at a very high frequency in the power factor correction based on DSP because the switching frequency is limited by the processing speed of DSP. So this paper present a method for power factor correction based on FPGA. By using FPGA, it doesn＇t need to calculate the duty cycle during every switching cycle but maintaining a very high frequency and good accuracy,