摘要
随着设计复杂程度的增加,RTL级仿真验证时间大幅度增加,已经成为设计的瓶颈.使用硬件仿真器可以加快仿真速度,提高仿真效率,是设计百万门以上电路的不可或缺的工具.
With the rapid growth of design complexity, the simulation of RTL code become more defficult, it may ask for longer time, Using simulation accelerator can help designers accelerate the speed of simulation and imply the simulation efficiency. It will be hard to simulate circuit that is up to 1,000,000 gates without it.
出处
《辽宁大学学报(自然科学版)》
CAS
2005年第4期350-352,共3页
Journal of Liaoning University:Natural Sciences Edition