期刊文献+

基于Trace-Cache的多级动态优化框架设计 被引量:4

Trace-Cache Based Framework for Multi-Level Dynamic Optimization
下载PDF
导出
摘要 对指令集进行扩展和添加新功能部件是提高处理器性能的有效途径.为了充分利用新的体系结构扩展,已有应用必需经过全新的优化编译.对于跨体系结构优化而言,二进制翻译已经被证明是一种行之有效的技术.本文结合trace技术和动态二进制翻译优化技术,提出一种多级动态优化框架结构,无需静态重新优化编译,在程序动态运行期间,引入多级动态优化方法和扩展指令调度.模拟结果显示该结构具有能有效形成大尺寸的指令调度窗口,准确选择热点代码及优化方法,有效提升旧有应用性能的优点,并有实现灵活,可扩展好等特点. New extension of instruction sot and new add-on function unit can improve the performance of microprocessor greatly. All the applications should be recompiled and rebuilt, otherwise they can' t benefit from those new instruction. This paper proposes a framework of multi-level dynamic optimization, which introduces instruction scheduling and optimizing for the architecture extension based on trace-cache in rantime. Experimental results show that it can enlarge the instruction window to select hot cedes and schedul- ing methods efficiently and effectively, and leverage the performance of original application without the need of recompiling. In addition,this framework is flexible and scalable to new optimizing chance and various platforms.
出处 《电子学报》 EI CAS CSCD 北大核心 2005年第11期1946-1951,共6页 Acta Electronica Sinica
基金 国家自然科学基金(No.90307001)
关键词 TRACE 动态优化 指令调度 指令级并行 trace dynamic optimization instruction scheduling ILP
  • 相关文献

参考文献12

  • 1E R Altman,K Ebicioglu,M Gschwind,S Sathaye.Advances and future challenges in binary translation and optimization[J].Proceedings of IEEE,2001,89(11):1710-1722.
  • 2James C Dehnert,Brian K Grant,John P Banning,et al.The Transmeta code morphing software:using speculation,recovery,and adaptive retranslation to address real-life challenges [A].Proceedings of the 2003 Inter national Symposium on Code Generation and Optimization[C].San Francisco:IEEE Computer Society Press,2003.15-24.
  • 3M M Merten,A Trick,et al.An architectural framework for runtime optimization[J].IEEE Transactions on Computers,2001.50(6):567-589.
  • 4Lian Li,Jingling Xue.A trace-based binary compilation framework for energy-aware computing[A].Proceedings of the 2004 ACM SIGPLAN/SIGBED conference on Languages,compilers,and tools[C].New York:ACM Press,2004.95-106.
  • 5J A Fisher.Trace scheduling:a technique for global microcode compaction[J].IEEE Transaction on Computer.1981,30(7):478-490.
  • 6Ebcioglu K,Altman E R.DAISY:dynamic compilation for 100% architectural compatibility[R].IBM T J Watson Research Center,IBM Research Report:RC20538,1996.
  • 7T R Halfhill.Transmeta breaks x86 low-power barrier [R].MicroDesign Resources,Microprocessor Report.(2000) NO:2/14/00-01.
  • 8Vasanth Balsa,E Duesterwald,S Banerjia.Dynamo:a trans-parent dynamic optimization system[A].Proceedings of the ACM SIGPLAN'00 Conference on Programming Language Design and Implementation[C].New York:ACM Press,2000.1-12.
  • 9Thomas M Conte,Kishore N Menezes,Mary Ann Hirsch.Accurate and practical profile-driven compilation using the profile buffer[A].Proceedings of the 29th Annual Inter national Symposium on Microarchitecture[C].Paris:IEEE Computer Society Press,1996.36-45.
  • 10Eric Rotenberg,Steve Bennett,James E Smith.Trace cache:a low latency approach to high bandwidth instruction fetching[A].Proceedings of the 29th Annual Inter national Symposium on Microarchitecure[C].Paris:IEEE Computer Society Press,1996.24-35.

同被引文献63

引证文献4

二级引证文献2

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部