浮点乘加部件中三操作数前导1预测算法的设计

Algorithmic Design of a 3-Operand Leading-One Prediction Logic in Floating-Point Multiple-Add Fused Units

提出了一种应用于高效浮点乘加部件的三操作数前导1预测算法。高效浮点乘加部件需要实现三个操作数的前导1预测(LOP)电路,传统的LOP算法不能直接处理三个操作数,通过间接方法实现又会增加关键路径延时并增大电路面积。三操作数LOP算法是针对传统LOP算法的这一局限提出的,可以有效缩短前导1预测电路的延时并减少面积,从而缩短整个乘加部件的延时。文章以龙芯2号通用CPU中浮点乘加部件的106位前导1预测电路为例,分别采用传统LOP算法和三操作数LOP算法实现了电路,实验结果表明,三操作数LOP算法比传统算法延时能降低约16.67%,总面积减少约19.63%。

This paper describes the design of a 3-operand leading-one prediction （LOP） logic for an enhanced floatingpoint multiply-add fused unit. This enhanced multiply-add fused unit need a LOP circuit to deal with 3 operands. However, the traditional LOP can not deal with 3 operands directly. If using an indirect method, the traditional LOP will increase the delay of the critical path and enlarge the circuit area. We implemented the 106-bit leading-one prediction circuit in the multiply-add fused unit of Godson-2, using the traditional LOP and the proposed LOP respectively. Compared with the design using the traditional LOP, the one using proposed LOP can reduce the delay of the critical path by 16.67% and reduce the area by 19.63% approximately.