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基于JTAG的ARM芯片系统调试 被引量:3

The Debug Technology for ARM Microprocessors based on JTAG
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摘要 嵌入式ARM软、硬件调试技术依赖于ARM处理器调试硬件,本文在分析JTAG边界扫描结构的基础上,介绍了EmbeddedICE、嵌入式跟踪等实时调试技术,并给出了一个嵌入式调试开发系统的实例。 The debug technology for embedded software and hardware of ARM depends on the ARM processor' s debug hardware. First analyzing the structure of J'TAG boundary-scan circuit,this paper introduced the debug technology of EmbeddedICE ,Embedded trace and so on. In the end ,an embedded debug development system is illustrated as an example.
出处 《微计算机信息》 北大核心 2005年第11Z期87-89,共3页 Control & Automation
基金 陕西省教育厅产业化培育项目 项目编号:04JC07
关键词 ARM JTAG EmbeddedICE 嵌入式跟踪 ARM JTAG EmbeddedICE Embedded Trace
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参考文献3

  • 1IEEE Std 1149.1-Standard Test Port and Boundary-Scan Architecture.
  • 2Timothy C.Kelly. Techniques and Technologies in Debugging and Optimizing Embedded Application. Embedded System Conference. April 2001
  • 3[英]SteveFurber著 田泽 于敦山 盛世敏译.《ARM SoC体系结构》[M].北京航空航天大学出版社2002,10..

同被引文献7

  • 1IEEE 1149.1 IEEE Standard Test Access Port and BoundaryScan Architecture.
  • 2the ARM7TDMI Debug Architecture.ARM Corporation.1995,2-26.
  • 3ARM7TDMI Technical Reference Manual.ARM Corporation.2001,121-142.
  • 4TAP Controller Source Code.OPEN-JTAG Project.2001
  • 5IEEE Standard 1149.1-2001.Standard Test Access Port and Boundary-Scan Architecture.IEEE Standards Board,2001.
  • 6..ARM7TDMI Datasheet..http://www.arm.com,,..
  • 7ST,ST72651 DTC Specification,Jan. 2002

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二级引证文献11

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