摘要
本文介绍了在ALTERA公司的EDA软件MAX+plusⅡ平台下,应用VHDL语言进行基于FPGA的数字化光电经纬仪中低速数字信号复接设计的具体实现方案,并给出部分程序设计。实验表明,此方案成功的将16路Kbit级低速数据信号复用为一路,并在接收端实现相应的解复用。
Under the platform of EDA software MAX +plus Ⅱ , the Low-speed digital signals multiplexing design scheme in the optical-electronic theodolite based on FPGA has been given in this paper. And the experiment shows that the design implements the synchronous multiplexing/de-multiplexing of 16 routes low-speed digital signals.
出处
《微计算机信息》
北大核心
2005年第11Z期122-123,共2页
Control & Automation
基金
中科院二期创新项目(C04708Z)