应用向量划分的低功耗确定性BIST方法

Deterministic and Low Power BIST Based on Scan Patterns Partition

提出一种能够与LFSR重播种技术结合的确定性向量生成方法,该方法利用扫描向量中的切片重叠来同时减少确定位数目和跳变数目,可大大降低测试功耗和测试存储.在硬件结构中,用一个译码器来生成控制信号.实验结果表明,对于ISCAS89基准电路,采用文中方法能够减少80%左右的跳变,而只需要原始Mintest测试集25%左右的测试数据存储.

Various LFSR reseeding methods have been proposed to improve fault coverage in traditional pseudo-random BIST and at the same time yield good test data compression. But a drawback of these methods is that the unspecified bits are filled with random values resulting in a great deal of transitions during scan-in thereby causing high power dissipation. In this paper, we present a new deterministic pattern generation structure that can be used in conjunction with LFSR reseeding scheme. The proposed scheme utilizes scan slices overlapping of test patterns to reduce the number of specified bits and the number of transitions at the same time. As a result, the scheme can significantly reduce test power and even further reduce test storage. A decoder is used to generate control signals. Experimental results indicate that the proposed method significantly reduces the switching activity by 80 % and only needs a relatively small test data storage（25 % of original Mintest test sets）.