摘要
卷积纠错编码广泛应用于各种通信领域,包括无线通信、视频点播等。如何来设计高性能的维特比译码器将最终决定一个通信系统的抗误码性能和数据纠错性能。本文提出了一种实用的设计思路,在ALTERA公司的STRATIX系列FPGA上实现了超过256kbps信源速率的全串行(2,1,7)维特比译码器。
Convolutional channel encoding is widely used in communication field, such as telecommunication, VOD. How to design a high quality viterbi decoder will significantly affect the performance of error protection and error correction of a communication system. This paper describes a practical design of serial viterbi decoder, with the source data rate above 256kbps and the type （2,1,7）, in an ALTERA＇s STRATIX FPGA, and shows that the implementation is successful both in technology and in practice.
出处
《航空电子技术》
2005年第4期5-9,共5页
Avionics Technology
关键词
卷积
维特比译码
FPGA
Communication
convolution
viterbi decoder
FPGA
