期刊文献+

1GSPS高速数据采集系统的设计与实现

Design and Realization of 1Gsps High Speed Data Acquisition System
下载PDF
导出
摘要 交替采样技术是一种理想的提高采样率的方法,但所伴随的高速输出数据对存储也带来了一定的困难。本文介绍了一种基于交替采样技术的高速数据采集系统,该系统采用了两片采样率为500Msps的A/D转换器,实现了1Gsps的采样率,并利用FPGA对A/D转换器的输出数据进行转换和缓存。本文着重介绍了该数据采集系统的数据转换和数据存储,并给出了仿真波形。 Time-interleaved sampling technique is an idea method to enhance a sampling rate, however, the high sampiing rate causes to a difficulty of storing the high-speed output data. This paper introduces a kind of high-speed data acquisition system based on time-interleaved technique. The system achieves a high sampling rate up to 1Gsps using two A/D converters with a comparatively lower sampling rate of 500Msps. Conversion and buffered storage of the output data from the A/D converters are implemented in FPGA. The data conversion and storage of the said data acquisition system are emphasized in this paper and a functional simulation waveform is given.
出处 《自动化信息》 2005年第12期39-41,共3页 Automation Information
关键词 交替采样 串并转换 A/D FPGA 高速数据采集系统 Time-interleaved sampling, serial-parallel conversion, A/D, FPGA
  • 相关文献

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部