硬件描述语言VHDL及其应用

VHSIC Hardware Description Language and Its Application to VLSI Design

ＶＨＤＬ（ＶＨＳＩＣＨａｒｄｗａｒｅＤｅｓｃｒｉｐｔｉｏｎＬａｎｇｕａｇｅ）是一种超高速ＶＬＳＩ硬件描述语言，能对集成电路的功能和结构进行描述，用ＣＡＤ软件将其编译和转换，并自动形成线路。概要地介绍了ＶＨＤＬ的设计组织和数据类型，并对ＶＨＤＬ的特点及其在ＶＬＳＩ设计中的应用要点做了一些探讨。

The VHSIC Hardware Description Language (VHDL)is one of the state-of-the-art VLSI design tool,which can be used to describe the behavior or structure of digital IC'S,and be compiled and translated to automatically optimize gate level structures by CAD tools. The VHDL design organization and data types are described. Applications of VHDL to VLSI design are discussed.