期刊文献+

一种新型结构的带状矩阵乘法器

A Novel Structure of Band-matrix Multiplier
原文传递
导出
摘要 在科学研究和实时信号处理中,需要进行大量的带状矩阵乘法运算.在分析经典二维,串行心动结构矩阵乘法器的基础上,提出了基于三维的、串并行数据传输的新型结构.改进后的矩阵乘法器具有高度的并行性和流水线的特点,均衡阵列负载,提高运算速度和优化资源的利用率. A large quantity of band-matrix multiplier calculations must be executed in scientific research and real-tlme signal processing. After analyzing the classic 2-D and serial transportation systolic array architecture, a novel structure matrix multiplier based on 3-D square and serial-parallel mixed transportation was proposed. The matrix multiplier of the new structure possesses advantages of parallel processing and flow computation. It can balance the load and increase the speed of calculation and the usage of resource.
作者 刘荣鑫 闵昊
出处 《复旦学报(自然科学版)》 CAS CSCD 北大核心 2005年第6期989-992,共4页 Journal of Fudan University:Natural Science
关键词 半导体技术 矩阵乘法器 并行运算 心动阵列 semiconductor technology matrix multiplier parallel calculation systolic array
  • 相关文献

参考文献7

  • 1吴淑泉,王前,谢运祥.适于消谐模型求解的矩阵乘法器设计与实现[J].华南理工大学学报(自然科学版),2003,31(8):1-5. 被引量:4
  • 2Noh M J,Kim Y,Han T D,et al.Matrix multiplications on the memory based processor array [EB/OL].http://ieeexplore.ieee.org/iel3/4600/12945/00592177.pdf,1997-04-28/2004-08-20.
  • 3Chow H C,Wey I C.A 3.3 V 1 GHz high speed pipelined Booth multiplier [EB/OL].http:// ieeexplore.ieee.org/iel5/7897/21766/01009876.pdf,2002-05-26/2004-08-20.
  • 4Kwentus A Y,Hung H T,Willson Jr A N.An architecture for high performance/small area multipliers for use in digital filtering applications [J].IEEE JSSC,1994,29(2):117-121.
  • 5Lee J J,Song G Y.Implementation of the super-systolic array for convolution [EB/OL].http:// ieeexplore.ieee.org/iel5/7805/01195065.pdf,2003-01-21/2004-08-20.
  • 6傅宇卓,王嘉芳,胡铭曾.一种新型2-DCT/IDCT结构的设计与实现[J].电子学报,2002,30(12A):2126-2129. 被引量:4
  • 7Moreno J H,Lang T.Matrix computations on systolic-type arrays [M].Boston:A Kluwer Academic Publishers,1992.

二级参考文献4

  • 1Enjeti P,Lindsay J F. Solving nonlinear equations of harmonic elimination PWM in power control [ J]. Electronics Letters, 1987,23 (12) :656 - 657.
  • 2Weston J H, Chang N Zhang,Hua Li. Some space considerations of VLSI systolic array appings [ J ]. IEEE Trans on Circuits and Systems-II:Analog and digital signal processing ,2001,48 ( 4 ) :419 - 424.
  • 3谢运祥,薛英杰.逆变电源的消谐控制技术[J].电源技术应用,2000,3(10):514-516. 被引量:4
  • 4谢运祥,周炼,彭宏.逆变器消谐PWM模型的同伦算法研究[J].中国电机工程学报,2000,20(10):23-26. 被引量:68

共引文献6

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部