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基于SoC的实时信号处理系统中存储系统的容错设计

Fault-Tolerant Memory System Design in SoC Real-time Digital Signal Processing System
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摘要 在基于SoC(System on Chip)技术的实时信号处理系统中,设计了全新的具有容错纠错自适应的二级冗余体系结构的存储系统,对新系统的可靠性进行了量化分析。在较小代价下,新系统的可靠性有显著的提高。 In the real-time digital signal processing system based on SoC( System on Chip), a new self-adaptive two-level redundancy fault-role-rant memory system is designed. The reliability of the whole memory is significantly enhanced.
出处 《计算机应用研究》 CSCD 北大核心 2006年第1期190-192,共3页 Application Research of Computers
基金 国家"973"计划资助项目(2004CB318202)
关键词 SOC EDAC DDR存储系统 实时信号处理系统 容错纠错自适应 二级冗余 SoC( System on Chip) EDAC( Error Detect and Correct) DDR Memory System Real-time Signal Processing System Fault-Tolerant Self-adaptive Two-level Redundancy
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