摘要
为了提高性能,通用处理器中所广泛采用的cache技术被引入到了嵌入式处理器中。该文采用基于仿真的方法分析了嵌入式应用环境下几个主要的cache结构参数对cache性能的影响。在分析过程中,还考虑了不同主存实现方式带来的影响。
Cache technique which is popular in general processor has been introduced to embedded processors to improve its performance. Using a simulation based method, this paper studies several basic cache structure parameters under embedded environment.Parameters involved include block size, cache size and associativity. During the analysis, this paper also takes into account the influence of main memory implementation.
出处
《计算机工程》
EI
CAS
CSCD
北大核心
2006年第1期237-239,275,共4页
Computer Engineering
基金
国家"863"计划基金资助项目(2003AA1Z1350)
