高速数据采集系统中SDRAM控制器的设计

Development of SDRAM Controller in High Speed Data Acquisition System

SDRAM作为大容量和高速的动态存储器,在高速数据采集系统中具有很大的应用价值,本文介绍了SDRAM的体系结构和工作原理,用Verilog HDL设计并在CPLD上实现了SDRAM接口控制器,实现高速数据采集系统中的大容量缓存。

SDRAM is a kind of large capacity and high speed dynamic memory; it has a great value in high speed data acquisition system. This paper introduces the architecture and the theory of SDRAM, designing SDRAM interface controller on CPLD with Verilog, implementation the buffer in high speed data acquisition system.