摘要
在单片机中用软件实现ISP和IAP,使得目前单片机中大容量的Flash存储器操作速度难以提 高。通过采用ASIC的设计流程,给出一种基于并行通信方式的硬件设计,从而实现了对Flash的快速操 作。用硬件描述语言Verilog-HDL设计硬件,并进行了仿真和综合。结果表明,硬件实现的ISP／IAP,操 作速度快、可靠性高。
Software-supported ISP and lAP in MCU usually hinder the flash memory of high capacity in quickening its operational speed. This paper presents a hardware design of ISP and IAP with parallel mode based on the design flow of ASIC. The simulation results insofar suggests advantages the new design has in obtaining high operational speed and reliable performance.
出处
《桂林电子工业学院学报》
2005年第6期23-26,共4页
Journal of Guilin Institute of Electronic Technology
