10Bit 50Ms/s流水线结构模数转换器的仿真分析及设计

Simulation Analysis & Design of 10 Bit 50Ms/s Analog-to-Digital Converter

在详细分析了高速高精度模数转换技术原理的基础上,选择采用九级流水线结构实现具有10位分辨率、50Mhz采样频率的模数转换器电路。本文设计的九级流水线结构的模数转换器,采用全差分的开关电容电路实现。为了保证开关电容电路处理模拟信号的速度和精度,采用了差分跨导运算放大器,这个放大器采用共源共栅补偿和动态共模反馈,具有很好的增益和带宽。

Based on the analysis of the theory of high-accurate and high-speed ADC technology, the paper introduces an analog-todigital circuit of 10 bit 50Mhz. The converter is realized by using a pipelined 9-stage architecture with a completely differential switching-capacitor circuit. In order to guarantee the speed and accuracy of the signals, a differential trans-conductance amplifier is applied. The amplifier utilizes cascode compensation and a dynamic common-mode feedback, having a high open-loop DC gain and wide bandwidth.