星上FPGA抗闩锁设计

Anti-Latch-Up Design of On-Board FPGA

根据星载电子设备CMOS电路中现场可编程逻辑阵列(FPGA)闩锁的发生机理,提出了输入/输出回路的抗锁定、二次屏蔽防止单粒子触发锁定等遏制闩锁触发条件,以及工作电源限流、闩锁检测与解除等遏制闩锁维持条件的设计,并给出了应用检测电路、板级锁定检测与解除、电流敏感器件检测电流和FPGA闩锁监测等应用实例。

According to the latch-up mechanism of field programmable gate array （FPGA） in CMOS circuit for onboard electronics, the designs for anti-latch-up triggering conditions such as anti-latch-up in input/output circuit and secondary shielding to prevent single event, anti-latch-up maintenance such as operation current limitation and latch-up detection and release were put forward in this paper. The application examples of employed test circuit, board latch-up detection and release, current detection by current sensor and FPGA latch-up monitoring were also given.