摘要
通过分析H.264软件解码器的结构和复杂度,确定了解码器在优化过程中的重点和难点,并结合TMS320DM642DSP性能特点,详细讨论了在TMS320DM642DSP平台上H.264解码器所采用的优化方法。这些方法主要涉及提高程序代码的并行性和增强存储器访问的效率,重点是运动补偿、IDCT等关键模块的优化。通过实验结果表明,本解码器可以实现CIF格式视频流的实时解码。
The architecture and complexity of H. 264 software decoder are analyzed, the emphasis and difficulties of optimization are figured out, then combining with the characteristics of TMS320DM642, this paper discusses the implementation and optimization of H. 264 decoder on TMS320DM642. The optimization is involved mostly with the enhancement of the code parallelism and the access efficiency of memory. This paper emphasizes on the optimization of the IDCT module and moving compensation module, The experiments result shows that the H. 264 decoder in this paper can implement the real - time decoding of the CIF video stream.
出处
《现代电子技术》
2006年第3期112-115,共4页
Modern Electronics Technique
