摘要
针对数字信号处理器的不同仿真和验证要求,提出了一种可测性软硬件协同仿真和验证平台的设计.采用可配置IP模块和总线结构,实现了硬件平台可配置性和可重用性;采用在线仿真模块,实现了实时的仿真验证功能;采用分层的方法设计软件平台,实现了软件平台的可配置性.实验结果表明,在50 MHz的工作频率下,此平台对16位数字信号处理器进行了指令集测试和FIR等应用程序的仿真验证工作.
To meet different request of co-simulation and co-verification for digital signal processor （DSP）, A software-hardware co-simulation and co-verification platform of DSP is proposed. Using reconfigurable IP module and bus-based method, reconfigurable and reusable hardware platform was realized. Using in-circuit simulator （ICE）, real-time simulation and verification was implemented, Using hierarchical design method, reconfigurable software was implemented, The experiments results show that the software-hardware co-simulation and verification platform can not only simulate instruction set, but also simulate application program. It successfully simulates and verifies a 16-bit fixed point DSP in 50 Mhz frequencv.
出处
《江南大学学报（自然科学版）》
CAS
2005年第6期574-578,共5页
Joural of Jiangnan University (Natural Science Edition)
基金
浙江省重大科技项目(021101559)
霍英东教育基金项目(94031)资助课题
关键词
协同仿真
协同验证
可配置
在线仿真
co-simulation
co-verification
reconfigureability
in-circuit simulator
