Viterbi译码器的低功耗设计

Low Power Consumption Design for Viterbi Encoder

Viterbi译码是一种应用广泛的最大似然估计算法;而功耗是通信系统设计中的一个重要制约因素,介绍了3种Viterbi译码的低功耗设计方法。对这3种设计方法的原理和实际使用效果作了详细的阐述,并分别做了仿真试验。仿真结果表明,这些方法能有效降低功耗。

The Viterbi algorithm is a maximum likelihood estimating method in many applications,power consumption is an important restrict factor in modern communication system designing.Three methods for low power design of Viterbi decoder are introduced.The principle and its application result of the 3 methods are presented in detail,and simulation tests are made respectively.The result shows that these methods could be used to reduce the power consumption effectively.