基于CORDIC算法的优化的直接数字频率合成器

Optimization of Direct Digital Frequency Synthesizers Based on CORDIC Algorithm

介绍了一种用CORD IC(坐标旋转数字计算机)算法模块替代DDS(直接数字频率合成器)中ROM表的方法。应用这种方法可以极大地减小存储量,取消存储量对提高数据精度的限制,提高DDS的性能。对这种方法进行了理论分析,并用一个设计例子得出了仿真结果,证实这种方法的可行性,最后简要介绍了这种结构的FPGA(现场可编程门阵列)设计方法。

In this paper, a method is proposed in which the ROM table in DDS is replaced by a module using CORDIC algorithm. Through using this method, data storage can be greatly reduced, and without the constraint from limited storage, the capability of DDS can be greatly enhanced. Firstly, the theoretic bases of the method is analyzed, which proves that the method proposed is feasible; then, through simulating a design example, the feasibility of the method is proved ; at last, the FPGA design for this architecture is briefly introduced.