摘要
介绍了基于VW2010编解码芯片、FPGA和NiosIICPU的嵌入式MPEG-4DVR监控系统的模块化设计,并在此基础上进一步介绍了NiosIICPU对VW2010芯片的控制。
An embedded MPEG-4 DVR system constructed by VW2010 coder chip and FPGA with Nios Ⅱ CPU is introduced in this paper to improve system flexibility, integration, and stability and reliability of data. And on the basis of modular design, the application of VW2010 chip controlled by NiosII CPU is also introduced.
出处
《电视技术》
北大核心
2005年第12期76-79,共4页
Video Engineering
基金
上海市信息化基金资助项目(沪CX20020017)
