HDTV SoC平台中存储器控制及其VLSI优化

SDRAM Controller Design and VLSI Implementation based on HDTV SoC Platform

在分析视频解码标准硬件实现要求的基础上,提出了SoC系统结构和SDRAM接口控制器的设计策略,包括冲突调度和面向提升带宽利用率的优化设计,并配置了一个二级请求缓冲池,配合固定优先级策略,解决了共享设备总线冲突问题;提出bank交叠方法隐藏读写等待时间,以达到提高带宽利用率的目的;另外,还用合并空闲状态的方法实现硬件可重用。

This paper carried out the HDTV system-on-a-chip architecture and several design policies of SDRAM controller based on analysis of hardware implementation performance of video standard eodec, including scheduling policy and bandwidth utilization-aware optimization. Two stage request pool together with fixed priority policy settle the problem of shared resources conflicts; changed FSM architecture with 2 banks hide cas latency which advances bandwidth utilization; all nop states are combined to a single state to make the implementation reuse by reconfiguration.