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一种实现任意分数阶神经型脉冲振荡器的格形模拟分抗电路 被引量:17

Implement Any Fractional Order Neural-type Pulse Oscillator with Net-grid Type Analog Fractance Circuit
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摘要 为了准确仿效生物神经脉冲信号的波形特征,提出并论述1/2阶网格型模拟分抗电路模型,1/2阶网格型主值分抗电路与T型、Π型、桥T型主值分抗电路之间的等效转换,用晶体谐振体和差接变量器实现它的方法,1/2阶网格型模拟分抗电路模型的频率特性以及用模拟分抗电路构造任意分数阶仿生神经型脉冲振荡器。实验中,以1/2阶网格型模拟分抗电路为例构造了1/2阶仿生神经型脉冲振荡器,其输出的仿生神经脉冲信号比较正确地模仿了实际生物神经脉冲振荡信号的波形特征。 The net-grid type analog fractsnee circuit for 1/2 order fractional calculus was put forward and analyzed. The equivalent conversion between T type,Ⅱ type,T type primary fractanee circuit and 1/2 order net-grid type analog primary fractance circuit, the equivalent conversion between syntony crystalloid, cross-linked variable transformer and 1/2 order net-grid type analog primary fractance circuit,and the frequency characteristic of 1/2 order net-grid type analog fractance circuit were disserted. Any fractional order bionic neural-type pulse oscillator was generated with analog fractanee circuit. The results of computer simulation showed that the fractional order bionic neural-type pulse wave accurately simulates actual biology neural-type pulse wave's shape characteristic by and large.
出处 《四川大学学报(工程科学版)》 EI CAS CSCD 北大核心 2006年第1期128-132,共5页 Journal of Sichuan University (Engineering Science Edition)
基金 国家自然科学基金资助项目(60572033)
关键词 分数阶微积分 晶体谐振体 分数阶神经型脉冲振荡器 滞迟神经型脉冲振荡器 神经电图 fractional calculus syntony erystalloid fractional order neural-type pulse oscillator hysteretie neural-type pulse oscillator eleetro-neurogram
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参考文献7

  • 1Newcomb R W. Neural-type microsystem: some circuits and consideration[C]//Proc of the 1980 IEEE Coderence on Circuits and Conmpters. New York:IEEE,1980.
  • 2Kimthl G.A hysteretic neural-type pulse oscillator[C]//Proc IEEE/ISCAS,New York:IEEE,1983,3:1173 - 1175.
  • 3Barranco B L.A novel CMOS analog neural oscillator cell[J]. IEEE, trans, 1989(5) :756-760.
  • 4Xiao Yuan.On the models of a class of programmable neural oscillator cell[C]//Proc of CHINA 1991 ICCAS,New York:IEEE, 1991:279 - 281.
  • 5Pu Yifei, Yuan Xiao, Liao Ke, et al. A recursive net-grid-type analog fractance circuit for any order fractional calculus[C]// Proceedings of the IEEE International Conference on Mechatronios & Automation. Niagara Falls,Canada,2005:1375 - 1380.
  • 6Pu Yifei,Yuan Xiao,Liao Ke,et al. Structuring analog fractance circuit for 1/2 order fractional calculus[C]//Proceedings of ASICON 2005. IEEE Press,2005:694-698.
  • 7Pu Yifei,Yuan Xiao,Liao Ke,et al. Implement any fractional order maltilayer dynamics associative neural network[C]//Proceedings of ASICON 2005. IEEE Press, 2005:1075 - 1079.

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