摘要
提高功能部件的并行性是开发高性能微处理器的基本途径。在RISC处理器中设计独立的地址产生器可实现算术运算与地址运算并行处理,从而提高RISC处理器的性能。文中根据现今RISC处理器中常用的寻址方式,提出了一种RISC地址产生器生成算法并进行了实例化。实例化结果可作为IP核应用到RISC处理器的设计中。
It is an essential way for developing high performsncemicroprocessor to improve parallelism of function componets . The RISC processorwith AG(Address Generator,AG) can realize the operations of arithmetic and address in parallel,which improve the performance of RISC processor. This paper proposes an algorithm of AG and give an instance for this algorithm, which is aceordingwith address mode of modem RISC processor. The instance of AG can be applied as an IP core used in design of RISC processor.
出处
《计算机技术与发展》
2006年第1期23-26,共4页
Computer Technology and Development
基金
国防预研项目(41308010203)