摘要
结合切比雪夫滤波器,可以实现宽带输入匹配的特性和片上集成窄带低噪声放大器(LNA)的噪声优化方法。提出一套完整的基于CMOS工艺的宽带LNA的设计流程,并设计了一个应用于超宽带(UWB)系统的3~5GHZ宽带LNA电路。模拟结果验证了设计流程的正确性。该电路采用SMIC0.18μmCMOS工艺进行模拟仿真。结果表明,该LNA带宽为3~5GHz,功率增益为5.6dB,带内增益波动1.2dB,带内噪声系数为3.3~4.3dB,IIP3为-0.5dBm;在1.8V电源电压下,主体电路电流消耗只有9mA,跟随器电流消耗2mA,可以驱动1.2pF容性负载。
A new design flow is presented by combining the wideband match network theory with the low noise design technique for integrated narrowband low noise arnplifier(LNA). As a demonstration, a wideband LNA is designed based on this design flow, which is validated by simulation using SMIC's 0.18 μm technology. Results from the simulation show that the LNA circuit has achieved an operating frequency ranging from 3 GHz to 5 GHz, a power gain between 4.4 dB and 5.6 dB, a noise figure from 3.3 dB to 4.3 dB and an IIP3 of 0.5 dBm. The circuit dissipates 11 mA current from a ,single 1.8 V power supply, and it is capable of driving 1.2 pF capacitive load.
出处
《微电子学》
CAS
CSCD
北大核心
2006年第1期114-117,共4页
Microelectronics
基金
国家重点基础研究发展(973)计划资助项目(G2000036508)
国家自然科学基金资助项目(60236020)
国家高技术研究发展(863)计划资助项目