“龙腾~RR2”微处理器流水线的设计及优化

Design and Optimization of the Pipeliningin RISCMicroprocessor "Longtium~RR2"

32位RISC微处理器“龙腾R2”是西北工业大学航空微电子中心2005年设计的一款自主知识产权的嵌入式微处理器。采用PowerPC体系结构，六级流水线，具有独立的数据Cache和指令Cache。文章介绍“龙腾R2”处理器流水线的设计思想以及优化方案。重点介绍流水线中相关的解决方案、精确异常的实现以及流水线中指令预取级的设计与实现等。

As the NWPU AMEC＇s full copyright RISC microprocessor, ＂Longtium R2＂ is compatible with PowerPC architecture. It is designed with six pipeline stages, the independent data cache and instruction cache. In this paper, we introduce the design and optimization of the pipelining, and focus on the elimination of pipelining hazard, the implementation of exact exception, the design and implementation of the instruction prefetehing stage, etc.