期刊文献+

一种基于遗传算法的VDSM IC电源网格动态IR-drop分析新方法 被引量:1

A novel method for dynamic IR-drop analysis of VDSM IC power grid based on genetic approach
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摘要 提出了一种用于超深亚微米集成电路电源网格IR-drop验证的新方法。该方法以遗传算法为基础,与已有的分析方法相比,该方法兼具静态IR-drop分析法和动态IR-drop分析法的优点,适用于包含大型组合模块的超大规模集成电路,可主动寻找电路中最大IR-drop。通过对ISCAS85电路实现的验证,发现了静态分析法不能发现的芯片边缘IR-drop问题。实验结果验证了该方法的正确性与有效性。 A novel GA based algorithm for UDSM VLSI power grid verification is presented, Unlike other existing techniques, this algorithm possesses merits of both the static and dynamic IR-drop analysis methods. For large scale combinational circuits, the maximum IR-drop can be automatically found following the proposed scheme. Application on ISCAS 85 example shows potential IR-drop faults which are unknown by using traditional methods, The correctness and efficiency are both verified by experiments.
出处 《电路与系统学报》 CSCD 北大核心 2006年第1期1-5,共5页 Journal of Circuits and Systems
基金 国家863计划资助项目(2002AA1Z1460)
关键词 VLSI CMOS 电源网格分析 组合电路 VLSI CMOS power grid verification combinational circuits
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参考文献14

  • 1Steele G O D,Rochel S,Hussain S Z.Full-chip verification methods for DSM power distribution systems[A].Design Automation Conference,1998.Proceedings[C].1998.
  • 2Cadence.POWER GRID VERIFICATION[S/OL].http://www.cadence.com/whitepapers/powerdistplan.html
  • 3Dharchoudhury A P R,Blaauw D,Vaidyanathan R,et al.D.Design and analysis of power distribution networks in Power PC microprocessors[A].Design Automation Conference,1998.Proceedings[C].1998.
  • 4Sapatnekar S S,Su H.Analysis and optimization of power grids[J].Design & Test of Computers,IEEE,2003,20(3):7-15.
  • 5Kong.D.-S.C.K.-H.L.G.-J.J.T.-S.K.J.-T.Efficient modeling techniques for IR drop analysis in ASIC designs[A].ASIC/SOC Conference,1999.Proceedings.12th Annual IEEE International[C].1999.
  • 6Chi-ying Tsui,Marculescu R M D,Pedram M.Improving the efficiency of power simulators by input vector compaction[A].Design Automation Conference Proceedings 1996,33rd[C].1996.
  • 7Marculescu R,D Marculescu,M Pedram.Sequence compaction for power estimation:theory and practice[J].IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,1999,18(7):973-993.
  • 8Su H,E Acar,S R Nassif.Power grid reduction based on algebraic multigrid principles[A].Design Automation Conference,2003.Proceedings[C].2003.
  • 9Kouroussis D,F N Najm.A static pattern-independent technique for power grid voltage integrity verification[A].Design Automation Conference,2003.Proceedings[C].2003.
  • 10Qian H,S R Nassif,S S Sapatnekar.Random walks in a supply network[A].Design Automation Conference,2003.Proceedings[C].2003.

同被引文献5

  • 1ROCHEL S,HUSSAIN S Z,STEELE G,et al.Full-chip Verification Methods for DSM Power Distribution Systems[C].New York:DAC '98.ACM,1998:744-749.
  • 2JIANG Yi-min,KRSTIC A,CHENG K T.Estimation for maximum instantaneous current through supply lines for CMOS circuits[J].IEEE Transactions on Very Large Scale Integration (VLSI) Systems,2000,8(1):61-73.
  • 3HSIAO M S,RUDNICK E M,PATEL J H.An Estimator for Peak Sustainable Power of VLSI Circuits[C].New York:ISLPED '97.ACM,1997:178-183.
  • 4汪鹏君,陆金刚,曾晓洋.基于整体退火遗传算法的低功耗最佳极性搜索[J].计算机辅助设计与图形学学报,2008,20(1):73-78. 被引量:10
  • 5王霞,周国标.整体退火遗传算法的几乎处处强收敛性[J].应用数学,2003,16(3):1-7. 被引量:10

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