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一种基于衬底偏置的超低压CMOS运算放大器 被引量：5

A novel ultra-low voltage CMOS op-amp based on bulk-biased MOSFET
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摘要 本文研究了基于衬底偏置MOSFET的阈值电压可调节特性及其低压特性，通过对所有MOSFET衬底偏置设计实现了超低压两级运算放大器。在0．8V的电源电压下，该运放的直流开环增益为89dB，相位裕度为67°，失调电压约为737．5μV，其单位增益带宽（GB）为440kHz，输入共模范围为65．3～734．1mV，输出电压范围为53．3～737．3mV。 Along with the analysis of its low voltage characteristics a bulk-biased MOSFET with tunable threshold voltage applicable of design of ultra-low voltage circuit is studied in this paper. An ultra-low voltage two-stage op amp is realized by biasing all the MOSFETs at their bulk terminals. At a 0.8V power supply, the DC open-loop gain of the op amp is up to 89dB, the Phase Margin is 67°, the input offset voltage of the op amp is 737.5μV, and its unity gain bandwidth is 440kHz, the input common mode range is 65.3mV-734. 1 mV, along with the 53.5mV-737.3mV out-put voltage swing.
作者 张海军 杨银堂 朱樟明 张宝君
机构地区 西安电子科技大学微电子研究所宽禁带半导体材料与器件教育部重点实验室
出处 《电路与系统学报》 CSCD 北大核心 2006年第1期12-15,共4页 Journal of Circuits and Systems
基金 国家自然科学基金资助项目(60476046) 国家预研基金资助项目(51408010601DZ01)
关键词 衬底偏置 超低压 运算放大器 CMOS bulk-biased ultra-low voltage op amp CMOS
分类号 TN402 [电子电信—微电子学与固体电子学]
  • 相关文献

参考文献7

  • 1Arvind Kumar, Sandip Tiwari, A Power-Performance Adaptive Low Voltage Analog Circuit Design Using Independently Controlled Double Gate CMOS Technology [A]. Proceedings of the 2004 International Symposium on Circuits and Systems [C]. 2004. 197-200.
  • 2Benjamin J. Blalock, Phillip E Allen. Designing I-V Op Amps Using Standard Digital CMOS Technology [J]. IEEE Transactions On Circuitsand System, Ⅱ: Analog and Digital Signal Processing, 1998, 45(7): 769-799.
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  • 4Phillip E Allen, Benjamin J Blalock, Gabriel A Rincon. A IV CMOS Op-amp Using Bulk-Driven MOSFETs [A]. Digest of Technicl Paper-IEEE international Solid-State Circuit Conference[C]. 1995-02, 38: 192-193.
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  • 7尹韬,朱樟明,杨银堂,郭磊.衬底驱动MOSFET特性分析及超低压运算放大器设计[J].Journal of Semiconductors,2005,26(1):158-162. 被引量：14

二级参考文献7

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  • 7林越,徐栋麟,任俊彦,许俊.基于共模电平偏移电路新型CMOS低电压满幅度运放设计[J].Journal of Semiconductors,2002,23(5):529-534. 被引量：9

共引文献13

同被引文献22

  • 1朱樟明,杨银堂,柴常春,殷和国,张春朋,付永朝,杨冰.一种基于0.35μm CMOS工艺的14位100MSPS DAC设计[J].固体电子学研究与进展,2004,24(2):191-195. 被引量：5
  • 2尹韬,朱樟明,杨银堂,郭磊.衬底驱动MOSFET特性分析及超低压运算放大器设计[J].Journal of Semiconductors,2005,26(1):158-162. 被引量：14
  • 3尹韬,杨银堂,汪家友,朱樟明.一种基于衬底驱动MOS技术的超低压运算放大器[J].电子器件,2004,27(4):618-621. 被引量：2
  • 4崔福良,黄林,马德群,洪志良.2.4GHz 0.35μm CMOS Gilbert下变频器[J].Journal of Semiconductors,2005,26(5):1045-1048. 被引量：1
  • 5Xuguang Zhang,Ezz I EI-Masry.A Regulated Body-Driven CMOS Current Mirror for Low Voltage Applications[J].IEEE Trans.Circuits and Systems-Ⅱ:Express Briefs,2004,51(10):571-577.
  • 6Shouli Yan,Edgar Sanchez-Sinencio.Low Voltage Analog Circuit Design Techniques:A Tutoria[J].IEICE Trans.Analog Integrated Circuits and Systems,2000,E00-A(2):1-17.
  • 7S S Rajput,S S Jamuar.Low Voltage Analog Circuit Design Techniques[J].IEEE Circuits and Systems Magazine,2002,2(1):24-42.
  • 8Small C. Shrinking devices put the squeeze on system packaging[J]. EDN,1994,39(4).
  • 9Arvind Kumar, Sandip Tiwari. A power-performance adaptive low voltage analog circuit design using independently controlled double gate CMOS technology [ C ]//Proceedings of the 2004 International Symposium on Circuits and Systems. Vancouver: the Institute of Electrical and Electronics Engineers, Inc, 2004 : 197 - 200
  • 10Blalock Benjamin J, Phillip E Allen. Designing 1-V Op amps using standard digital CMOS technology [ J]. IEEE Transactions on Circuits and System, Ⅱ: Analog and Digital Signal Processing, 1998, 45(7) : 769 -799

引证文献5

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电路与系统学报
2006年 第1期

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