VLSI定时驱动布局算法

A TIMING-DRIVEN VLSI PLACEMENT ALGORITHM

定时驱动布局算法是改善ＶＬＳＩ性能的重要措施，现有算法主要建立在面向网络和面向通路两种技术之上，仅获得局部最优解．本文以获得全局最优解为目标，从电路逻辑结构和传输延时出发，提出了面向电路最大延时的布局算法．实验表明，本算法是有效的．

Timing-driven placement is an important method to improve VLSI performance. The existing algorithms are net-oriented or path-oriented,which lead toonly local solutions. Based on the logic structure and propagation delay of the circuit to be designed,the circuit maximum propagating delay oriented placement algorithm is presented to lead to a global solution. The experiments show that the algorithm is effective.