摘要
介绍了基于胚胎细胞阵列的容错系统.对其整体架构、“细胞”内部结构以及容错机制做了详细阐述.在FPGA平台上用一个一位全加器的实例,验证了系统的可实现性.
Embryonic arrays system, a new fault- tolerant architecture, is proposed. The system architecture, inside hardware structure and error handling are described in detail. The practicability of the system is validated by implementing the simulation of a one-bit full adder based on FPGA.
出处
《复旦学报(自然科学版)》
CAS
CSCD
北大核心
2006年第1期127-130,共4页
Journal of Fudan University:Natural Science