基于Nios处理器的FED控制系统设计

Design of FED Controller Based on Nios Processor

FED是新一代真空平板显示器件,具有色彩自然逼真、响应速度快、宽视角、低功耗、矩阵选址等突出优点,应用范围广泛。FED显示控制系统是整个驱动电路的核心,随着分辨率和规模化的提高,需要高速的帧存储器和高速的接口,加速系统的运行速度,减少传输时间。主要介绍了一种采用Nios软核作为中央处理器,进行主要的计算处理、控制各种信号的FED显示控制系统。同时使用FPGA作为协处理器,把一些运算中常用到的耗用大量CPU时钟的运算以Nios软核的形式嵌入到系统中,利用动态可重构的原理实现各个软核函数的分时复用,提高了整个FED控制系统的性能。

FED is a newer vacuum flat panel display. It would be widely applied by reason of natural and vivid color,short response time,wider angle of view, lower power consumption, matrix addressing. Control system is the core of FED drive circuit. With the development of resolution and scale,FED control system requires frame memory and interface with high speed. It also needs to increase exeeution speed,minimize the transmission time. This article mainly introduces that FED control system makes Nios as central processing unit,which would compute and control signals. At the same time, we use FPGA as coprocessor, embed operation in the systems, which consumes a great quantity of CPU clock and is often used. We utilize the principle of dynamic reconstruct,realize time - sharing multiplex,improve properties of FED control system.