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2.048Mbit/s异步映射入SDHVC-12的映射设计

The Mapping Design for 2.048 Mbit/s Tributary Asynchronous Mapping into SDH VC 12
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摘要 对SDH体系中的2.048Mbit/s支路信号异步映射进VC-12的具体过程进行了分析。主要进行了正/零/负码速调整的参数设计,包括通过读写时差的变化来确定缓冲存储容量和上、下门限;并给出了码速调整。 In this paper,we analyzed the asynchronous mapping of 2.048 Mbit/s tributary into SDH VC 12 and showed the major function blocks.It include two parts:positive/zero/negative justification and 500 μs VC 12 multiframe generator.We mainly analyzed the features of adapting PDH 2.048 Mbit/s tributary into SDH C 12 by using positive/zero/negative justification.We got relative optimized parameter: the capacity of elastic store,up threshold,and dowm theshold.At the same time,we designed a coder to get the time sequences we need to structure 500 μs VC 12 multiframe.
出处 《光通信研究》 1996年第2期21-27,共7页 Study on Optical Communications
关键词 光同步 数字传输网 映射 码速调整 SDH SDH,\ mapping,\ justification
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