基于VHDL语言的I^2C总线数据监视采集系统

VHDL-based data monitor and interception system of I^2C bus

针对I2C总线上数据信息的监视、截取等问题,设计一种新的基于VHDL语言的数据监视采集系统.采用VHDL语言对数据监视采集模块进行功能描述和实现,在第三方VHDL编辑仿真软件Active-HDL下进行编译和时序仿真.结果表明,设计的数据采集系统能够有效对I2C总线数据进行监视和截取.

To solve the problem of monitoring and intercepting data on I^2C bus, a new data collection approach based on VHDL language was presented. The data monitoring and collection system was described and realized by VHDL language, and compiled and simulated with system function under the third part VHDL compiling software of Active-HDL language. Simulation results show that the presented system of data collection can monitor and intercept data on I^2C bus effectively.