全状态伪随机序列发生器的实现

Design of the All Status Pseudo-Random Sequences Generator

对于伪随机序列发生器一直存在如何选择反馈函数和如何产生全部的反馈序列两大问题。经过推导可以得到3-12bit伪随机序列发生器的本原多项式,再根据伪随机序列信号的特性选择出较好的全状态伪随机序列发生器的非线性反馈函数,即通过修改线性移位寄存器的反馈网络将移位型计数器的全部状态加以利用,实现全状态伪随机序列信号。同时应用FPGA实现12bit全状态伪随机序列发生器并对其产生的序列进行仿真分析。

Two major problems of designing pseudo-random sequence generator are how to choose the feedback function and how to generate the complete feedback sequence. The primitive polynomial of 3-12 pseudo-random sequence generator is obtained after the deductions. The better nonlinear feedback function of all states pseudo-random sequence generator can be picked out according to the characteristic of pseudorandom sequence signal, then using all states of shifting counter through modifying the linear shift register feedback network to realize the all states pseudo-random sequence signal. Meanwhile realizes the 12 bit all states pseudo-random sequence generator using FPGA and emulating the sequence in the software of MAXPLUS Ⅱ.