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FABRICATION OF STRAINED-Si CHANNEL P-MOSFET's ON ULTRA-THIN SiGe VIRTUAL SUBSTRATES

FABRICATION OF STRAINED-Si CHANNEL P-MOSFET's ON ULTRA-THIN SiGe VIRTUAL SUBSTRATES
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摘要 In the ultra-thin relaxed SiGe virtual substrates, a strained-Si channel p-type Metal Oxide Semiconductor Field Effect Transistor (p-MOSFET) is presented. Built on strained-Si/240nm relaxed-Si0.8 Ge0.2/ 100nm Low Temperature Si (LT-Si)/10nm Si buffer was grown by Molecular Beam Epitaxy (MBE), in which LT-Si layer is used to release stress of the SiGe layer and made it relaxed. Measurement indicates that the strained-Si p-MOSFET's (L=4.2μm) transconductance and the hole mobility are enhanced 30% and 50% respectively, compared with that of conventional bulk-Si. The maximum hole mobility for strained-Si device is 140cm2/Vs. The device performance is comparable to devices achieved on several μm thick composition graded buffers and relaxed-SiGe layer virtual substrates. In the ultra-thin relaxed SiGe virtual substrates, a strained-Si channel p-type Metal Oxide Semiconductor Field Effect Transistor (p-MOSFET) is presented. Built on strained-Si/240nm relaxed-Si0.8 Ge0.2/ 100nm Low Temperature Si (LT-Si)/10nm S i buffer was grown by Molecular Beam Epitaxy (MBE), in which LT-Si layer is used to release stress of the SiGe layer and made it relaxed. Measurement indicates that the strained-Si p-MOSFET's (L=4.2μm) transconductance and the hole mobility are enhanced 30% and 50% respectively, compared with that of conventional bulk-Si. The maximum hole mobility for strained-Si device is 140cm^2/Vs. The device performance is comparable to devices achieved on several μm thick composition graded buffers and relaxed-SiGe layer virtual substrates.
出处 《Journal of Electronics(China)》 2006年第2期266-268,共3页 电子科学学刊(英文版)
关键词 STRAINED-SI Virtual SiGe substrates p-type Metal-Oxide Semiconductor (MOS) Field-EffectTransistor (FET) 金属氧化物 半导体 MOS 场效应管 晶体管
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