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多晶硅双栅全耗尽SOI CMOS器件与电路 被引量:2

Fully-depleted SOI CMOS Devices and Circuits with Dual Poly Gate
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摘要 对多晶硅双栅全耗尽SO I CM O S工艺进行了研究,开发出了1.2μm多晶硅双栅全耗尽SO I CM O S器件及电路工艺,获得了性能良好的器件和电路。NM O S和PM O S的阈值电压绝对值比较接近,且关态漏电流很小,NM O S和PM O S的驱动电流分别为275μA/μm和135μA/μm,NM O S和PM O S的峰值跨导分别为136.85 m S/mm和81.7 m S/mm。在工作电压为3 V时,1.2μm栅长的101级环振的单级延迟仅为66 ps。 Dual poly gate fully-depleted SOI CMOS devices and circuits were investigated. The process of 1.2μm fully-depleted SOI CMOS devices and circuits with dual poly gate were successfully developed. The performance of devices and circuits are excellent. The VT of NMOS and PMOS is symmetrical. The leakage current is very small. The drive currents of NMOS and PMOS are 275 μA/μm and 135μA/μm respectively. The gm Of NMOS is 136.85 mS/mm and PMOS is 81.7 mS/mm. The per-stage propagation delay of 101-stage ring oscillator is 66 ps with 3 V supply voltage.
作者 连军 海潮和
出处 《固体电子学研究与进展》 CAS CSCD 北大核心 2006年第1期124-127,共4页 Research & Progress of SSE
关键词 绝缘体上硅 全耗尽 互补金属氧化物半导体 SOI fully-depleted CMOS
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参考文献4

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