摘要
提出一种H.264/AVC的1/4像素精度、可变块大小运动估计器的设计方法,它包括全像素和1/4像素运动估计两大部分,前者是由256个处理单元所构成的二维脉冲式阵列,并重复使用先前运算的结果。其采用全域搜索的方法,能在一个脉冲期间对比一个候选区块,算出像素差值的绝对值总和和运动向量,并传给1/4像素运动估计器。实验结果证明,此运动估计器可处理720×480解析度、30fps的影片。
This paper proposes a variable block-size motion estimator （VBSME） down to quarter-pixel precision for the next generation of video coding standard H.264. The proposed motion estimator consists of a full-pixel precision part and a sub-pixel precision part. The former is a 2D systolic array with 256 processing elements （PE） employing a computation result reuse methodology. Its full search algorithm can complete matching a candidate macroblock during every clock cycle. It figures out the sum of absolute differences （SAD） and motion vectors （MV） at full-pixel precision for the sub-pixel precision part. The sub-pixel precision part is a mathematical model to refine the SADs and the MVs to quarter-pixel precision. Synthesized into a TSMC 0.13μm CMOS technology, it takes 195K gates at 50MHz to process 720×480 video sequences at 30 frames per second （fps）.
出处
《电视技术》
北大核心
2006年第3期17-20,36,共5页
Video Engineering
