摘要
文章介绍了与ARM7TDMI指令集兼容的嵌入式微处理器NPUARM7控制器设计,提出了按指令分类的状态机结构,以及由状态机控制下的分步译码的控制信号产生机制。该设计简化了译码控制逻辑,提高了译码效率,消除了流水线复杂译码逻辑容易产生的瓶颈问题,适应高速度、低功耗嵌入式应用要求。
The paper introduced the controller design of a embedded microprocessor, NPUARM7, which is compatible with ARM7TDMI instructions set. It presented a novel Finited State Machine (FSM) mechanism which was decided by the different sort of instruction. A decoding method step by step controlled by FSM was desefihod. The method simplified the decoding logic circuits, improved the decoding efficiency, and eliminated the bottle-neck in the RISC pipeline. Test shows that this scheme is much suitable for high-speed, low-power and embedded application.
出处
《微电子学与计算机》
CSCD
北大核心
2006年第4期1-3,共3页
Microelectronics & Computer
基金
国防预研项目(41308010307)