低压低功耗CMOS电流反馈运算放大器的设计

Design of low voltage and low power CMOS current feedback operational amplifiers

电源电压的下降对模拟电路的设计是一个难题。如今模拟电路的典型电源电压大约是2．5～3V，但是发展的趋势表明电源电压将是1.5V，甚至更低。在这种情况下，国内外研究人员致力于设计适用于标准CMOS工艺的低压电路蛄构。主要在文献[1]基础上设计了一种新型的CMOS电流反馈运算放大器（CFOA），使用了0．5μmCMOS工艺参数（阈值电压为0．7V），模拟结果获得了与增益关系不大的带宽。在1.5V电源电压下产生了约6．2mW的功耗。

To the design of analog circuit, it is a challenge when its supply voltage is lowo Now the typical supply voltage of analog circuit is about 2.5-3 V, but the trend suggests it will be 1.5 V, even much lower. Under this condition, great effort of research members domestic and abroad is devoted to the design of low-voltage circuit structure with standard CMOS processes. The aim of this paper is to describe a new CMOS current-feedback operational amplifiers based on the literature[1] , simulation results of the CFOA,using 0.5μm CMOS process parameters with threshold voltage 0. 7 V, result in bandwidth gain-independence. Circuit parameters show a： power consumption around 6.2 mW from 1.5V supply voltage.