T-Bit路由器中支持QOS高速大容量缓冲机制的研究

Research of Fast and Large Packet Buffers Supporting QoS in T-bit Router

报文交换采用报文缓冲区来存储调度输出端口的数据包,而缓冲区的读写速度往往决定了T-Bit路由器自身的性能。针对目前的DRAM读写速率较低这一缺陷,提出了一种利用DDR内存来实现支持QOS的高速大容量的缓存机制。实现了一种支持12路2.5GbpsIP报文调度工程方案,该方案可保证调度输出端口速率可达10Gbps。

All packet switches contain packet buffers to store the pockets of the out scheduling ports,The capacity of a T-bit router is often dictated by the speed of its packet buffers.To the problem of slow rate DRAM,we consider a particular packet buffers architecture consisting of faster and larger DDR memory and providing QoS guarantees.The project is able to schedule 12 IP packet queues operating at rate 2.SGbps,and assure the rate of the out ports is 10 Gbps.