摘要
为了减少系统资源的占用量,对胚胎阵列的细胞结构进行改进。通过只在细胞中存储它们可能用到的信息来减少资源的占用率,以现场可编程门阵列(Field Programmable Gate Array,FPGA)为平台,验证了改进后胚胎阵列的可实现性,同时结果显示改进后的胚胎阵列在资源利用方面更具优势。
In order to reduce the usage of resource, the architecture of cells in embryonic arrays is improved by only storing the usable information in the cells.Then the practicability of the improved embryonic array is validated on FPGA. And the result indicates that the improved embryonic array has many advantages in the usage of resource.
出处
《信息与电子工程》
2006年第2期153-156,共4页
information and electronic engineering
关键词
信号处理技术
胚胎阵列容错系统
改进
列替换法
资源占用
information processing technology
fault-tolerant system of embryonic arrays
improvement
column-elimination
usage of resource
