适合基站放大器应用的图形化SOILDMOSFET的设计与分析

A Novel LDMOS Power Amplifier in Patterned-SOI Technology for Base Station Applications

设计了一种新型图形化SOI(patterned-Silicon-On-Insulator)LDMOSFET(lateraldouble-diffusedMOSFETs)结构,埋氧层在沟道下方是间断的.工艺和性能模拟分析表明,此结构具有SOI器件低泄漏电流和低输出电容的特性,而且能抑制自加热效应和浮体效应.当漂移区长度为3μm时,开态击穿电压可达到30V、关态电压为71V、截止频率6.2GHz、最大振荡频率20GHz,2GHz时、栅偏压3V时的输出功率为0.8W/mm、功率增益为28dB.这些电学参数适合2G、60V无线通讯基站功率放大器的要求.

A novel PSOI （Patterned-Silicon-On-Insulator） LDMOSFET with a silicon window beneath P body is proposed and simulated. The novel LDMOSFET did not degrade the advantage of SOl structure＇s low leakage current and parasitic capacitance, which also suppressed the self-heating effects and floating body effects, The on-state and the off-state breakdown voltage was 30V and 70V respectively. The cut-off frequency and the maximum oscillation frequency was 6,2GHz and 20GHz respectively, the output power and power gain at 2GHz was 0.8W/mm and 28dB respectively, which was sufficient for a 2GHz, 60V- class base station amplifier applications.