期刊文献+

基于BiC MOS的高精度LDO线性稳压电路 被引量:2

Low-dropout linear regulator based on BiCMOS
下载PDF
导出
摘要 设计了一种基于0.8μm。双阱BiCMOS高压工艺的高精度LDO线性稳压电路.电路采用四管单元带隙基准作温度补偿,多级误差放大反馈结构稳定输出电压,其中直接将带隙基准电路作为误差放大电路的一部分,从而在不增加电路复杂性的基础上,使整个误差放大电路经过多级放大,增益得到大幅提高.Hspice仿真结果表明:电路在较宽的频率范围内,电源抑制比约为85dB;在温度由-20~80℃变化时,其温度系数约为±35×10^-6/℃;电源电压在4.5~28V之间变化时,最坏情况下其线性调整率为0.031mV/V;负载电流由0mA到满载2mA变化时,其负载调整率仅为0.01mV/mA. On the basis of BiCMOS bandgap reference with one-order temperature compensation, a LDO linear regulator with high voltage regulation accuracy was designed, which was stabilized by a multi-stage error amplifier. As a first gain stage of the multi-stage error amplifier, the bandgap reference circuit consisted of four transistors, in which 0.8 μm,dual well BiCMOS high voltage technology was used. Hspice simulation showed that this circuit could operate with temperature coefficient ±35× 10^-6/℃ (ambient temperature -20-80℃), line regulation 0. 031 mV/V (power 4.5-28 V), load regulation only 0.01 mV/mA (load current 0-2 mA),and power supply rejection ratio(PSRR) 85 dB(at 1 kHz).
出处 《华中科技大学学报(自然科学版)》 EI CAS CSCD 北大核心 2006年第5期59-61,共3页 Journal of Huazhong University of Science and Technology(Natural Science Edition)
关键词 LDO稳压电路 BiCMOS高压工艺 温度系数 线性调整率 负载调整率 电源抑制比 LDO linear voltage regulator BiCMOS high voltage technology temperature coefficient line regulation load regulation power supply rejection ratio (PSRR)
  • 相关文献

参考文献3

  • 1Grebene A.Bipolar and MOS analog integrated circuit design[M].New York:John Wiley & Sons Inc,2003.
  • 2Lee B S.Technical review of low dropout voltage regulator operation and performance[R].Texas Instrument Application Report,slva072,1999.
  • 3Behzad Razavi.Design of analog CMOS and integrated circuits[M].New York:McGraw-Hill,2001.

同被引文献23

引证文献2

二级引证文献2

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部